RP_GRPA=0, RP_GRPC=0, WP_GRPB=0, RP_GRPB=0, WP_CPU=0, WP_GRPC=0, RP_CPU=0, WP_GRPA=0
Access Control Register for SRAM1
| RP_CPU | CPU Read protection 0 (0): CPU read of memory protection is disabled. 1 (1): CPU read of memory protection is enabled. |
| WP_CPU | CPU Write protection 0 (0): CPU write of memory protection is disabled. 1 (1): CPU write of memory protection is enabled. |
| RP_GRPA | Master Group A Read protection 0 (0): Master group A read of memory protection is disabled. 1 (1): Master group A read of memory protection is enabled. |
| WP_GRPA | Master Group A Write protection 0 (0): Master group A write of memory protection is disabled. 1 (1): Master group A write of memory protection is enabled. |
| RP_GRPB | Master Group B Read protection 0 (0): Master group B read of memory protection is disabled. 1 (1): Master group B read of memory protection is enabled. |
| WP_GRPB | Master Group B Write protection 0 (0): Master group B write of memory protection is disabled. 1 (1): Master group B write of memory protection is enabled. |
| RP_GRPC | Master Group C Read protection 0 (0): Master group C read of memory protection is disabled. 1 (1): Master group C read of memory protection is enabled. |
| WP_GRPC | Master Group C Write protection 0 (0): Master group C write of memory protection is disabled. 1 (1): Master group C write of memory protection is enabled. |